1. Field of the Invention
The present invention relates to the structures, capabilities and methods of operating a substrate transport container suitable for storing or transporting objects such as semiconductor wafers, photo-masks or hard-disks in a highly clean environment.
2. Description of the Related Art
As pattern sizes of semiconductor devices become finer, it is anticipated that even higher degree of cleanliness would be required in the future. For example, it is anticipated that the target control size of the particulate contaminants that can cause pattern defects and shorting of wiring would become smaller than 0.1 μm. Further, in addition to particulate contaminants, it becomes necessary to reduce gaseous contaminants. By adsorbing onto the semiconductor wafers, various hydrocarbon molecules cause deterioration in dielectric breakdown voltage of gate oxide film or thickness variations in deposited films. Base gases react with chemical enhancement type photoresist to result in loss of resolution and acidic gases can cause corrosion of wirings.
In addition, moisture (humidity) has been targeted for reduction in recent years. This is because finer patterning has led to the use of a variety of materials in forming wirings and films, and moisture in the environment can sometimes bind with the above-mentioned materials to cause problems. On the other hand, independent of the trend towards finer patterning, the size of the semiconductor wafers is increasing and automation is also progressing in the field of wafer-processing technologies. Automation of semiconductor manufacturing line is promoted by the fact that it is necessary to segregate humans, who act as a contamination source, and the fact that, as the diameter of the semiconductor wafers increases, the weight of the transport container increases to about 10 kg such that manual handling becomes difficult. Further, it becomes important to satisfy standardized conditions such as common structure and size of manufacturing equipment and transport apparatus as a necessary condition in the automated manufacturing line.
In the past, with increasing circuit density and speed of semiconductor chips, aluminum has been used as the material for wiring to connect elements within the semiconductor chip. However, when the width of the wires becomes less than 0.13 μm, conventional aluminum wiring causes serious problems of heat generation and signal delay so that, in place of aluminum wiring, there is a trend towards the use of copper wiring, which has lower resistivity than aluminum wiring.
Also, SiO2 has been used as the insulation material for isolation of wiring. However, the dielectric constant of SiO2, which is at about 4, is high, so that replacement of aluminum wiring with copper wiring only results in about 20% improvement in signal delay. There has thus been a need to use a substance of lower dielectric constant of less than 3 for the insulation material.
Prior to such a development, examination of copper wiring and low dielectric materials for insulation has already been carried out and identified a potential problem, arising from of the processing of chips with line-width at the level of 0.18 μm. Such low dielectric materials are based on organic materials or porous materials so that problems are encountered such as absorption of moisture from the environment, which leads to increasing dielectric constants, and therefore, these materials must be handled differently from conventional insulation films and are presenting an extremely difficult challenge.
Also, copper used for wiring behaves differently from aluminum that has been used in the past because of its tendency to react with oxygen in the air to produce oxide films. Also, because the copper molecules have higher chemical activity as compared with aluminum molecules such that, if particles containing copper or copper vapor itself is discharged into the cleanroom, the clean room is contaminates the cleanroom to lead to severe drop in the yield of semiconductor chips. Also, organic contaminants on silicon surface have been known to cause a drop in the reliability of gate oxide film, an increase in incubation time in the low pressure CVD processes and abnormal film growth. Therefore, even if a superior material is found in the future for use in making low dielectric insulation films, it is conceivable that it cannot be adopted because of its susceptibility to contamination from such impurities as organic substances and ions in the environment. Conversely, by controlling the processing environment, an opportunity may emerge of using those materials that have not been able to be used in the past. Also, if ammonia is present, the photo-resist material applied on the semiconductor wafer exhibits a so-called “T-top” phenomenon, which refers to a phenomenon that the top section of the developed photo-resist is wider than the bottom section.